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Low Power and Process Variation Aware SRAM and Cache Design
English
362 b
Delivery to Austria
Up to 30 days for returns
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This book addresses process variability and power management for embedded memories, which are becoming dominant components in today s Systems on Chip (SoCs). It provides thorough background on voltage scaling and the reliability effects on memories, while describing memory behavior at different voltages and frequencies. The authors describe a cross-layer approach, simultaneously targeting the manufacturing of devices, the inner-design of the memory circuits, as well as the way they are architected into a system. This approach enables the design of reliable, power-efficient systems in which memories are dominating area, power, and performance.
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