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Layout Optimization in VLSI Design

Language EnglishEnglish
Book Hardback
Book Layout Optimization in VLSI Design Bing Lu
Libristo code: 01414475
Publishers Springer, Berlin, November 2000
The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout op... Full description
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The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout optimization problems emerging with the advent of very deep submicron technologies in semiconductor processing. Audience: A reference work for graduate students, senior undergraduates, and researchers.

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About the book

Full name Layout Optimization in VLSI Design
Author Bing Lu, Ding-Zhu Du, S. Sapatnekar
Language English
Binding Book - Hardback
Date of issue 2001
Number of pages 288
EAN 9781402000898
ISBN 1402000898
Libristo code 01414475
Publishers Springer, Berlin
Weight 599
Dimensions 160 x 240 x 17

Categories

Computing & Information Technology > Computer science > Computer modelling & simulation
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